- SystemVerilog Fundamentals with an SVA Overview
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- SystemVerilog for RTL Designers
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- Verification Using SystemVerilog
(more...)
- SystemVerilog Assertions In-depth
(more...)
- SystemC Modeling with SCV and TLM
(more...)
- Advanced Verification Planning
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- e Language Basic Training using Specman Elite
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- e Language Developer Training using Specman Elite
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- Specman Elite Advanced Applications
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2009 Public Course Offerings
* March
o 03-05 -- Verification using SystemVerilog -- Austin, TX
o 23-27 -- SystemVerilog Equidem -- Austin, TX
* April
o 14-15 -- SVA Equidem -- San Jose, CA
o 28-30 -- SystemVerilog for RTL Design -- Portland, OR
* May
o 23-28 -- SystemVerilog Equidem -- Fort Collins, CO
* June
o 15-17 -- Verification using SystemVerilog -- Austin, TX
On-site Courses
The majority of Correct Designs courses are delivered on-site to meet specific customer needs. Please contact us for more informaiton.
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Customized Course Content
Correct Designs is also happy to customize and tailor our course content to
meet the specific application needs of customers.
This is a unique feature that is available from Correct Designs
due our vast amount of real-world experience with advanced
design and verification techniques across a broad spectrum of semiconductor products.
Please contact us for more information.
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