| Kevin has 19 years of experience
in logic verification of high-performance processor designs and
simulation methodology development, including 5 years of management. After
receiving a BSEE in 1983 from Tulane University in New Orleans, Kevin
joined IBM and helped bring into production, a research-prototype simulation
accelerator in Boca Raton, FL. In 1984, he supported the IBM DSL/1 logic
design language, simulator, and synthesis tools. In 1986 he was technical
lead on developing an 8-port communications adapter for the 9370 systems.
Kevin was asked to manage a department of engineers developing PS/2 memory
and communications adapters in 1988. After moving to Austin in 1990, Kevin
staffed and managed large verification departments including the team
working on the Power2 RISC chipset used in IBM workstations. He was asked
to lead the verification of the 615 processor on assignment in Burlington,
VT for one year in 1995. Upon his return to Austin, he led the verification
teams for the 630 Power3 design, and the GigaProcessor Power4, the most
complex processor developed by IBM. In 2000 before leaving IBM, he was one of
only 3 verification engineers ever to reach the level of Senior Technical
Staff Member in the company at that time.
Over the past 2 years,
Kevin has taught dozens of verification and design engineers nationally
as a certified instructor for Verisity's
Specman Elite product. He's written
thousands of lines of 'e' code as the simulation lead on
a 10Gbit network processor classifier chip using self-checking, directed-random simulation
methodology. He's developed test plans, correctness models, test cases, and perl code to produce a
high quality simulation environment being used by dozens of his client's design and verification engineers.
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